SPI, I2C, UART: An Introduction to Serial Communication Protocols

2026-06-13 embedded, communication

In embedded development, we often need to let an MCU (microcontroller unit) exchange information with peripherals, such as LED matrices, LCD displays, and so on. In the human society, information exchange is mostly achieved through language, either spoken or written; in the embedded realm, information exchange between an MCU and peripherals also has its own language, which we usually call a communication protocol.

The fastest form of information exchange is parallel, where all the bits of a piece of data are transmitted simultaneously over many wires—like building a multi-lane highway where many cars can travel at the same time. However, in embedded design, hardware resources are often very limited, and pulling a dozen wires from a device solely to transmit a specific type of data is highly impractical. In this case, serial communication becomes essential: it transmits the bits of the data one after another in the time domain over just two or three wires, like opening a narrow country lane where cars must pass one by one.

Although serial transmission is often several times slower than parallel, it greatly reduces the required area and number of pins, making it much more economical. Moreover, today’s hardware can usually process data at megahertz frequencies; the extra time needed rarely has a significant impact in most real-world scenarios.

The three most commonly used serial communication protocols are:

SPI: Serial Peripheral Interface;
I2C: Inter-Integrated Circuit;
UART: Universal Asynchronous Receiver/Transmitter.

This article covers the hardware configuration, data transmission, and special mechanisms of these three protocols.

Note: This post is a translated version. See here for the original content.

Fundamental Concepts

Before diving into the details of the protocols, let’s look at a few fundamental concepts involved in transmission.

Master and Slave: The device that initiates the communication is called the master; the other devices are called slaves. In most cases, the MCU acts as the master and the peripheral as the slave. Note that a slave can also send data to the master; who is the master and who is the slave is determined by which device initiates the entire transfer.
Clock Signal: Since data is transmitted serially, controlling the “timing” of transmission becomes particularly important. One approach is to use a periodic signal as a metronome, with the master and slave then using this metronome to determine when to send data and when to read it. This periodic signal is called the clock signal. Protocols that require a clock signal are synchronous; those that do not are asynchronous.
Edge-sensitive and Level-sensitive: The terms “edge” and “level” refer to the clock signal.
- An edge is the transition process of the clock signal from low to high or from high to low. “Edge-sensitive” means data is read at a specific edge (rising edge or falling edge).
- “Level-sensitive” means data is read while the clock signal is at a specific level (high or low).

Edge-sensitive and level-sensitive signal illustration

Edge-sensitive (rising edge) and level-sensitive (high level) signal illustration.

💡 If a data signal is edge-sensitive, it must remain stable for a short period before and after the specified clock edge; otherwise, a setup/hold time violation may occur, easily driving the system into a metastable state and affecting functional correctness. This is a hardware limitation that cannot be eliminated and is a challenge in high-frequency digital IC design.

SPI: A Complete and Flexible Communication Protocol

Hardware Configuration

The SPI protocol supports communication between one master and multiple slaves and requires four types of connections.

Wire Name	Function	Description
`SCK`	Clock wire	Generated by the master; polarity and phase selectable
`CS`	Chip Select wire	Determines which slave the master talks to; one per slave, active low
`MOSI`	Master Out Slave In	Data wire; shared by all slaves
`MISO`	Master In Slave Out	Data wire; shared by all slaves

SPI protocol hardware configuration diagram

SPI protocol hardware configuration.

The SPI design allows data to be transmitted at extremely high speeds; for example, the STM32G473RCT6 supports a rate of up to 8.0 MBit/s (8 million bits per second). Moreover, because the input and output wires are separate, SPI can achieve full-duplex communication—data sent from the master to the slave and from the slave to the master can be transmitted simultaneously.

Data Transmission

Start and Stop

The SPI chip select wire CS is active low. Therefore, data transmission begins when CS is set low and ends when CS is set high.

Transmission Process

SPI data signals are edge-sensitive. The clock signal is carried on the SCK wire, and we can adjust the clock polarity (CPOL) and clock phase (CPHA) to meet the requirements of different peripherals.

Clock Polarity (CPOL): The idle state level of the clock. It can be 0 or 1:
- 0 means the clock idles low,
- 1 means the clock idles high.
Clock Phase (CPHA): Which edge of the clock signal to use for sampling, counted from the start of the clock signal. It can be 0 or 1:
- 0 means use the first edge after the clock signal starts,
- 1 means use the second edge after the clock signal starts.

SPI clock polarity and clock phase illustration.

On both the MOSI and MISO data wires, data is sent most significant bit (MSB) first, meaning the higher bits are transmitted before the lower bits. The figure below shows an example of an SPI transmission.

SPI transmission example

SPI transmission example: master sends data to slave, CPOL = 0, CPHA = 0.

Implementation

SPI can be implemented on an MCU in two ways: software SPI and hardware SPI.

Software SPI uses general-purpose input/output (GPIO) pins to control the four SPI wires, with the code toggling the GPIOs to transmit data.
Hardware SPI leverages the MCU’s built-in SPI module. At the code level, you only need to call the corresponding library functions. For instance, on STM32G4 series MCUs, after configuring the relevant pins, you can directly call HAL_SPI_Transmit and HAL_SPI_Receive to send and receive data using the on-chip SPI peripheral.

Software SPI typically achieves a lower transfer rate than hardware SPI.

💡 From a broader perspective, a software implementation is generally less efficient than a hardware implementation for the same problem. Software is indirect: all code is ultimately translated into machine instructions and executed on a general-purpose processor, which is not optimized for any specific task. Hardware is direct: the requirement is realized directly in digital logic, creating a dedicated digital circuit designed to solve that particular problem, which can therefore be optimized to the extreme.

A real-world example can be seen in quantitative trading, where calculation speed is critical—a sell order delayed by just a few milliseconds can cause losses of thousands or even tens of thousands of dollars. Beyond squeezing every bit of performance out of software, practitioners have even begun using FPGAs (Field-Programmable Gate Arrays) for relevant computations because they execute faster. An FPGA is a more direct hardware implementation; its internal structure consists of basic logic elements that can be connected through programming to form a digital circuit for a specific function.

Below is an example of software SPI, based on STM32G4 series MCUs.

// CPOL = 0, CPHA = 0
void spi_transmit(const GPIO_TypeDef* CS_port, const uint16_t CS_pin, uint8_t data) {
  HAL_GPIO_WritePin(SCK_port, SCK_pin, GPIO_PIN_RESET); // SCK low, idle 
  HAL_GPIO_WritePin(CS_port, CS_pin, GPIO_PIN_RESET);   // CS low, start transmission

  for (int i = 7; i >= 0; --i) { // MSB first
    HAL_GPIO_WritePin(MOSI_port, MOSI_pin, (data & (1 << i)) ? GPIO_PIN_SET : GPIO_PIN_RESET);
    HAL_GPIO_WritePin(SCK_port, SCK_pin, GPIO_PIN_SET);   // SCK high, rising edge
    HAL_GPIO_WritePin(SCK_port, SCK_pin, GPIO_PIN_RESET); // SCK back to low
  }

  HAL_GPIO_WritePin(CS_port, CS_pin, GPIO_PIN_SET);   // CS high, end transmission
  HAL_GPIO_WritePin(SCK_port, SCK_pin, GPIO_PIN_RESET); // SCK low, back to idle 
}

I2C: Clever Scheduling of a Single Data Wire

We can see that SPI has one drawback: the number of wires is still relatively high, especially the chip select wire, which requires one per slave. Is there a way to reduce the number of wires?

Thankfully, there is. Take a look at I2C.